In this video from the 2016 OpenFabrics Workshop, Debendra Das Shama presents: Evolution of PCI Express as the Ubiquitous I/O Interconnect Technology. "The PCI architecture has continuously evolved to be the cornerstone for I/O connectivity in computing, communication and storage platforms for more than two decades as the attach point for storage, networking, and a wide range of external I/O connectors. It enables a power efficient, high bandwidth, and low latency interconnect between CPUs, host controllers, memory and devices. This session delves into the latest PCI Express® (PCIe®) innovations in hardware, software, and electromechanical form-factors. PCIe 4.0, the fourth generation signaling technology at 16 GT/s, doubles per-pin bandwidth in a power-efficient manner while maintaining full backwards compatibility with the prior three generations. Architected re-timers form an essential ingredient for long reach channels in PCIe 4.0 architecture. PCIe continues to provide architectural improvements to reduce system latencies and support low cost flexible platform integration. The specification is evolving to accommodate lower power (both active and idle), software and protocol enhancements for power-efficient performance, I/O virtualization, and SoC efficiency. A robust compliance program across different form-factors ensures a plug-and-play open standard with seamless interoperability across a wide range of platforms using common components. These mechanisms scale from large platforms with fabrics interconnecting hundreds of thousands of discrete components across multiple subsystems, to highly integrated system-on-chip (SoC) implementations." Learn more: https://www.openfabrics.org/index.php/about-the-2016-ofa-workshop.html Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter