AMD has revealed efficiency targets and some of the details of the upcoming RDNA 3 architecture, the first GPU with chiplets, slated to arrive later this year. Can AMD's GPU chiplet design revolutionize graphics cards like it did with CPUs? We spoke with Sam Naffziger, VP and Corporate Fellow at AMD, regarding some of the design challenges chip makers are facing and what's being done to continue driving higher performance and increased efficiency. 1:10 - Lighting round, news of the week 11:24 - Begin AMD GPU architecture discussion 11:58 - The Problems Facing the Tech Industry 14:41 - RDNA 3 Overview 15:20 - 5nm and What to Expect 18:42 - Chiplet Packaging 24:12 - How Much Power Will RDNA 3 Use? 29:25 - Rearchitected Compute Unit 31:17 - Optimized Graphics Pipeline 31:53 - No Matrix/Tensor Cores in RDNA 3 34:08 - Next-Gen AMD Infinity Cache and Infinity Fabric 38:15 - Process Nodes, Benefits of Having I/O on Older Process 42:20 - Analog Scaling for I/O Is Terrible 45:53 - Move to Fabless Was Great for AMD, TSMC Also Benefitted 47:42 - Cost of Design, Testing, etc. for Newer Nodes 49:56 - Where Will Nvidia Ada / RTX 40-Series Land 51:52 - AMD Gaining Ground Every Generation of RDNA GPU 53:00 - Moore's Law Slowing Down, Wrapping it Up