Putting multiple heterogeneous chips is the way forward for improved performance and more functionality, but it also brings a host of new challenges around partitioning, layout, and thermal. Michael Posner, senior director for die-to-die connectivity at Synopsys, talks with Semiconductor Engineering about the advantages of 3D integration, why it’s finally going mainstream, and what’s needed in the EDA tools to make this as straightforward as chip-to-chip integration.